Proteus VSM USB simulation represents the worlds first (and only) schematic based USB Simulation engine. You can now design your own USB peripheral device entirely in Proteus (using one of the supported microcontrollers) and then test both the firmware and the hardware by simulating the circuit. Communication is modelled down to Windows driver level, with all requests to and replies from the simulated USB device displayed in the USB Transaction Analyser. Proteus VSM is discussed in more detail here.
The main aim of the Proteus VSM USB Simulation is to allow complete simulation of those microcontrollers having an on-board USB peripheral. Since the vast majority of such devices have a USB device peripheral as opposed to a USB host controller peripheral Proteus VSM is currently limited to simulation of USB devices (devices that attach to the USB socket on the computer), and specifically to simulation of the following USB Device classes:
Support for additional classes (and indeed additional microcontroller variants) is on-going and, depending on demand, implementation of USB host simulation support may also be considered.
The schematic in Proteus represents the peripheral device (e.g. a USB memory stick or a USB mouse). A special schematic part called the USB connector is wired to the USB enabled microcontroller and clicking on this schematic part during simulation is equivalent to plugging in the device to a USB slot on your PC. The microcontroller executes the firmware through the schematic and USB communication will take place with the PC operating system in the same way as plugging in a physical equivalent device to a spare USB socket on the computer.
The USB Transaction Analyser can be used to decode and display all URB transactions and register access operations during simulation and the full range of Proteus VSM debugging techniques are also available. This means that you can design, debug and test your USB peripheral entirely within the Proteus software environment before you construct a physical prototype.
Analysis capabilities can be upgraded to include Graph Based Simulation via the Advanced Simulation Options module.
Please see the commercial price list for pricing information or contact us to further discuss requirements.
Proteus VSM PIC18F4550 model simulating Microchip Technologies Mass Storage firmware to present a file stored in the simulated MMC model to Windows via USB.
In practise, running a USB simulation differs little from any other VSM simulation. The typical procedure is outlined below.
Currently modelled Microcontrollers Supporting USB Simulation:
The Proteus USB Analyser is a seperately licenced product that displays all requests and replies to and from the simulated USB device. This provides an invaluable aid both to understanding the USB protocol and in verification of firmware implementation. The main Analyser window consists of two parts: the Requests List and the Requests Description as shown below.
The USB Analyser in Proteus
The Requests list on the left hand pane of the Analyser displays all requests in tree format. There are three levels of requests; IRP requests (IOCTL, MJ_PNP), Transaction requests (IN, OUT, SETUP) and register operations associated with a given transaction.
The request description forms the right hand side of the Analyser and provides detailed tabular information on the currently selected item in the Requests List. Given that the Requests list is granular to three levels it follows that comprehensive information can be retrieved at either the IRP Level, the transaction level or the register level.
The small toolbar at the top of the Analyser provides options to start logging, stop logging and also to clear the log. This is particularly useful where you are interested in communications after the setup phase or in response to activity from the host controller.
