What's New In Proteus Design Suite 7.5
The following summarises the main feature enhancements in the Version 7.5 release. New peripheral simulation models are detailed here whilst minor system enhancements and modifications are announced in the members area of the support forums.
- Improved Library Search facility including the ability to search by library and stockcode and a filter to show only parts with simulation models.
- Ability to directly output library index properties e.g. Manufacturer (MFR), Stock/Order Code (CODE) and Description (DESC) in the Bill of Materials.
- Full, nominal density implementation of the IPC-7351 surface mount land pattern standard footprint libraries.
- Ability to specify a filename for the PCB Layout associated with a given schematic.
- Option to allow inner zones (zone nesting) in power plane generation.
- Support for rounded rectangle SMT pads and fiducials in PCB footprints.
- Increased visibility for power plane boundaries.
- Choice of database, CADCAM or temporary origins in the GotoXY command.
- Dimensions display on PCB package previews.
- Option to print each PCB layer on a seperate page.
- Chip Resistors - several tolerances and powers - from Panasonic and Yageo.
- Varistors from Littlefuse.
- Resistive Trimmers - single, 5, 11 & 12 turns from Bourns.
- Poly and thin film, Ceramic Multilayer, Mica RF, Aluminium and Tantalum capacitors from various manufacturers.
- Fixed, multilayer and tight tolerance RF inductors.
- Rectifier, Schottky, Switching, TVS, Varicap and Zener diodes.
- BJT's, IGBT, JFET and MOSFETs.
- Diacs, SCR and Triacs switching devices.
- Full Debugging support (source code stepping, breakpoints and variables display) for EasyHDL scriptable generators.
- Pre-defined SPICE option sets for standard defaults, improved convergence and improved accuracy.
- Display of elapsed time between pause/breakpoints allows easy measurement of code execution times.
- Automatic single stepping (step animation) with user defined time interval between steps.
- more... ATMEGA169, ATMEGA169P, ATMEGA329, ATMEGA3290, ATMEGA329P, ATMEGA649, ATMEGA6490
- more... PIC16F818, PIC16F819
- more... PIC18F1230, PIC18F1330, PIC18F2480, PIC18F2580, PIC18F4480, PIC18F4580, PIC18F2585, PIC18F2680, PIC18F4585, PIC18F4680
- Proteus VSM for 8086 (new product) plus 8255, 8253, 8251, 8279
Proteus 7.5 is available free of charge to all customers whose USC is valid as of 01st January 2009.
What's New In Proteus Design Suite 7.4
The following summarises the main feature enhancements in the Version 7.4 release. New peripheral simulation models are detailed here whilst minor system enhancements and modifications are announced in the members area of the support forums.
- more... High Completion rates on even the most complex of boards.
- Shape Based (gridless) technology vastly improves routing performance of fine pitch SMD parts and densely packed PCB's.
- Adaptive, cost based algorithms minimise via counts and overall trace length, providing results which are often hard to distinguish from manual routing.
- Fully automated routing operation is included as standard whilst batch mode (scripted) and interactive modes are available in PCB Design Level 2 and higher.
- Interactive mode provides the ability to route a user specified selection (for example, to route only one net).
- Comprehensive command set enhances the flexibility of advanced routing modes (e.g. specifying fanout distances and direction)
- more... Introduced the new dsPIC33 microcontroller family.
- more... Added support for USB Device Simulation with Atmel AVR microcontrollers (AT90USB646, AT90USB1286).
- 17 additional new Atmel AVR Variants added.
- New models for Texas Instruments Op-amps and miscellaneous others.
- more... Syntax Highlighting for EasyHDL scripts added.
- Improved algorithm for both guided and unguided device replacement within ISIS.
- Replaced routing strategies with 'net classes' which can be configured directly from the Design Rule Manager.
Proteus 7.4 is available free of charge to all customers whose USC is valid as of 01st August 2008.
What's New In Proteus Design Suite 7.3
The following summarises the main feature enhancements in the Version 7.3 release. New peripheral simulation models are detailed
here whilst minor system enhancements and modifications are announced in the members area of the
support forums.
- more... Added support for the industry standard ODB++ Manufacturing Output Format (requires PCB Design Level 2 or Higher)
- Added Design Rule Manager to ARES, allowing fully customisable board constraints. Includes the ability to set rules by layer and/or by strategy and also to create rules governing behaviour between strategies on the board.
- Added support for IEEE / North American component symbols to the capacitors and resistors libraries.
- Support for specifying PTH/Non Plated holes.
- Fully compatible with Windows VistaTM.
- Extensive work on the core simulation engine, resulting in simulation speeds up to 100% faster than previously, better convergence algorithms and improved simulation accuracy.
- Added Syntax Highlighting to the VSM Source Window.
- more... Added scriptable generators using EasyHDL : a rich. high level scripting language based on BASIC. This allows the scripting of arbitrary stimuli to a simulation via the generator dialogue form. Requires a licence for Advanced Simulation Features.
- New Virtual Terminal with ANSI/VT52/VT100 and X/Y/Zmodem protocol support.
- Debugger plugin for Atmel AVR Studio.
- Updated VUSB drivers including support for CDC & custom HID classes.
- more... ATMEGA128, ATMEGA1280, ATMEGA1281, ATMEGA164P, ATMEGA168, ATMEGA168P
- ATMEGA2560, ATMEGA2561, ATMEGA324P, ATMEGA328P, ATMEGA48, ATMEGA48P
- ATMEGA640, ATMEGA644, ATMEGA644P, ATMEGA88, ATMEGA88P
- ATTINY11, ATTINY12, ATTINY13, ATTINY15, ATTINY24, ATTINY25, ATTINY44, ATTINY45
- ATTINY2313, ATTINY261,
ATTINY461, ,ATTINY84, ATTINY85, ATTINY861
- PIC12F683, PIC16F688
Proteus 7.3 is available free of charge to all customers whose USC is valid as of 01st June 2008.
